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Philips Semiconductors
Product specification
Dual 4-input NAND gate
74ABT20
QUICK REFERENCE DATA
SYMBOL PARAMETER Propagation delay An, Bn, Cn, Dn to Yn Output to Output skew Input capacitance Total supply current VI = 0V or VCC Outputs disabled; VCC = 5.5V CONDITIONS Tamb = 25C; GND = 0V TYPICAL UNIT
LOGIC DIAGRAM
A0 B0 1 2 6 4 5 Y0
tPLH tPHL tOSLH tOSHL CIN ICC
CL = 50pF; VCC = 5V
2.7 2.2 0.3 3 50
C0
ns
D0
ns pF A
VCC = Pin 14 GND = Pin 7
A1 B1 C1 D1
9 10 8 12 13 Y1
SA00352
PIN CONFIGURATION
A0 B0 NC C0 D0 Y0 GND 1 2 3 4 5 6 7 14 13 12 11 10 9 8 VCC D1 C1 NC B1 A1 Y1
LOGIC SYMBOL (IEEE/IEC)
1 2 6 4 5
&
9
SA00350
10 8 12 13
PIN DESCRIPTION
PIN NUMBER 1, 2, 4, 5, 9, 10, 12, 13 6, 8 7 14 SYMBOL An, Bn, Cn, Dn Yn GND VCC NAME AND FUNCTION
SF00068
Data inputs Data outputs Ground (0V) Positive supply voltage
FUNCTION TABLE
INPUTS An L X X X Bn X L X X Cn X X L X H Dn X X X L H OUTPUT Yn H H H H L
LOGIC SYMBOL
1 2 4 5 9 10 12 13
A0
B0
C0 D0
A1
B1
C1
D1
Y0 Y1 VCC = Pin 14 GND = Pin 7 6 8
H H NOTES: H = High voltage level L = Low voltage level X = Don't care
SA00351
ORDERING INFORMATION
PACKAGES 14-Pin Plastic DIP 14-Pin plastic SO 14-Pin Plastic SSOP Type II 14-Pin Plastic TSSOP Type I TEMPERATURE RANGE -40C to +85C -40C to +85C -40C to +85C -40C to +85C OUTSIDE NORTH AMERICA 74ABT20 N 74ABT20 D 74ABT20 DB 74ABT20 PW NORTH AMERICA 74ABT20 N 74ABT20 D 74ABT20 DB 74ABT20PW DH DWG NUMBER SOT27-1 SOT108-1 SOT337-1 SOT402-1
1995 Sep 22
1
853-1811 15793
Philips Semiconductors
Product specification
Dual 4-input NAND gate
74ABT20
ABSOLUTE MAXIMUM RATINGS1, 2
SYMBOL VCC IIK VI IOK VOUT IOUT Tstg PARAMETER DC supply voltage DC input diode current DC input voltage3 DC output diode current DC output voltage3 DC output current Storage temperature range VO < 0 output in Off or High state output in Low state VI < 0 CONDITIONS RATING -0.5 to +7.0 -18 -1.2 to +7.0 -50 -0.5 to +5.5 40 -65 to 150 UNIT V mA V mA V mA C
NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150C. 3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
SYMBOL VCC VI VIH VIL IOH IOL t/v Tamb DC supply voltage Input voltage High-level input voltage Low-level input voltage High-level output current Low-level output current Input transition rise or fall rate Operating free-air temperature range 0 -40 PARAMETER LIMITS MIN 4.5 0 2.0 0.8 -15 20 10 +85 MAX 5.5 VCC UNIT V V V V mA mA ns/V C
DC ELECTRICAL CHARACTERISTICS
LIMITS SYMBOL PARAMETER TEST CONDITIONS Tamb = +25C MIN VIK VOH VOL II IOFF ICEX IO ICC ICC Input clamp voltage High-level output voltage Low-level output voltage Input leakage current Power-off leakage current Output High leakage current Output current1 Quiescent supply current Additional supply current per input pin2 VCC = 4.5V; IIK = -18mA VCC = 4.5V; IOH = -15mA; VI = VIL or VIH VCC = 4.5V; IOL = 20mA; VI = VIL or VIH VCC = 5.5V; VI = GND or 5.5V VCC = 0.0V; VO or VI 4.5V VCC = 5.5V; VO = 5.5V; VI = GND or VCC VCC = 5.5V; VO = 2.5V VCC = 5.5V; VI = GND or VCC VCC = 5.5V; One data input at 3.4V, other inputs at VCC or GND -50 2.5 TYP -0.9 2.9 0.35 0.01 5.0 5.0 -75 2 0.25 0.5 1.0 100 50 -180 50 500 -50 MAX -1.2 2.5 0.5 1.0 100 50 -180 50 500 Tamb = -40C to +85C MIN MAX -1.2 V V V A A A mA A A UNIT
NOTES: 1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second. 2. This is the increase in supply current for each input at 3.4V. 3. For valid test results, data must not be loaded into the flip-flop or latch after applying the power.
1995 Sep 22
2
Philips Semiconductors
Product specification
Dual 4-input NAND gate
74ABT20
AC CHARACTERISTICS
GND = 0V; tR = tF = 2.5ns; CL = 50pF, RL = 500 LIMITS SYMBOL PARAMETER WAVEFORM MIN tPLH tPHL tOSHL tOSLH1 Propagation delay An, Bn, Cn, Dn to Yn Output to Output skew An or Bn to Yn 1 2 1.0 1.0 Tamb = +25C VCC = +5.0V TYP 2.7 2.2 0.3 MAX 3.9 3.4 0.5 Tamb = -40C to +85C VCC = +5.0V 0.5V MIN 1.0 1.0 MAX 4.6 3.8 0.5 ns ns UNIT
NOTE: 1. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the the same direction, either HIGH-to-LOW (tOSHL) or LOW-to-HIGH (tOSLH); parameter guaranteed by design.
AC WAVEFORMS
VM = 1.5V, VIN = GND to 3.0V
An, Bn, Cn, Dn
INPUT VM tPHL VM tPLH
OUTPUT
tPHL
MIN
Yn
VM
VM OUTPUT N same part
tPLH
MIN
SA00353
Waveform 1. Propagation Delay for Inverting Outputs
tPLH
MAX
tPHL
MAX
tOSLH
tOSHL
SA00381
Waveform 2. Common edge skew
TEST CIRCUIT AND WAVEFORMS
VCC 90% NEGATIVE PULSE VIN D.U.T. RT CL RL POSITIVE PULSE VOUT VM 10% tTHL (tF) tTLH (tR) 90% VM tW 90% VM 10% 0V 10% 0V PULSE GENERATOR tTLH (tR) tTHL (tF) AMP (V) tW VM 90% AMP (V)
Test Circuit for Outputs
10%
VM = 1.5V Input Pulse Definition
DEFINITIONS
RL = Load resistor; see AC CHARACTERISTICS for value. CL = Load capacitance includes jig and probe capacitance; see AC CHARACTERISTICS for value. RT = Termination resistance should be equal to ZOUT of pulse generators. INPUT PULSE REQUIREMENTS FAMILY Amplitude 74ABT 3.0V Rep. Rate 1MHz tW 500ns tR 2.5ns tF 2.5ns
SH00067
1995 Sep 22
3

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